1. Field of the Invention
The invention generally relates to a method of manufacturing a memory device and, more particularly, to a method of manufacturing a flash memory device, in which it can minimize an inter-gate interference phenomenon.
2. Discussion of Related Art
A multi-level cell (MLC) is a flash memory cell used to store 2-bit data in one memory cell in order to increase the level of integration. In the MLC, one cell can be divided into four level states. Accordingly, the bit number of the MLC is twice greater than that of a single level cell (SLC) used to store 1-bit data in one memory cell.
In the MLC, however, cell uniformity becomes irregular since the cell threshold voltage (Vt) varies. This results in an interference phenomenon generated by the capacitance between the cells.
It is therefore necessary to reduce the shift in the cell threshold voltage (Vt). However, as the level of integration of devices increases, spaces at which a unit active region and a unit field region will be formed become more narrow. This makes the interference phenomenon more problematic since the inter-gate distance becomes smaller.